As the semiconductor industry has progressed into nanometer technology process nodes in pursuit of higher device density, higher performance, and lower costs, challenges from both fabrication and design issues have resulted in the development of three-dimensional designs, such as a multi-gate field effect transistor (FET), a fin FET (FinFET) and a gate-all-around (GAA) FET. In the semiconductor device with three-dimensional structures having a high aspect ratio such as fin structures, dielectric (insulating) films have to be more uniformly formed over such three-dimensional structures. Furthermore, better film qualities have been required.